This invention relates to a semiconductor memory device arranged to overcome a leakage trouble.
For semiconductor memory devices such as SRAM (static random access memory) or the like having bit lines connected to a power source in a stand-by condition, a leakage trouble, such as a defective bit line operation, occurs when dust or the like causes a short circuit between one of the bit lines and the ground. It is the conventional practice to overcome such a leakage trouble by replacing the defective memory cell with a redundant memory cell. When the leakage trouble includes a defective stand-by current along with the defective bit line operation, however, it is impossible to overcome the leakage trouble merely by replacing the defective memory cell with a redundant memory cell.